Text Size: A A A
Position: Left Middle



You are viewing the category: Intel Developers Conference 2006

  Poker Sites


IDF: New HD Interface

Saturday 11th March, 2006 - 01:06 GMT

Posted in: Apple News, Intel Developers Conference 2006

Written by: Alex Brooks

Today both Apple and Intel have been showing off a new cable designed to provide high definition video to a display, that standard is UDI.

It is hoped that the new cable with replace the ageing VGA, UDI promises to bring the power and functionality of HDMI to high end PCs, although UDI is unable to carry sound it is compatible with both HDMI and DVI.

Unfortunately the standard is becoming very much focused on DRM, due to UDI including HDCP (High-Bandwidth Digital Content Protection).

Read more on HDCP

Comment on this post, currently 0
Trackback


IDF: Intel Debuts Energy Efficient Microarchitecture

Tuesday 7th March, 2006 - 22:14 GMT

Posted in: Intel Developers Conference 2006

Written by: Alex Brooks

Intel Corporation today disclosed details of its forthcoming Intel® Core™ microarchitecture, a new industry–leading foundation for Intel’s multi–core server, desktop and mobile processors for computers later this year. The first Intel Core microarchitecture products built on Intel’s advanced 65nm process technology will deliver higher–performing, yet more energy–efficient processors that spur more stylish, quieter and smaller mobile and desktop computers and servers that can reduce electricity and real–estate associated costs, and provides critical capabilities such as enhanced security, virtualization and manageability for consumers and businesses.

“The Intel Core microarchitecture is a milestone in enabling scalable performance and energy efficiency,” said Rattner. “Later this year it will fuel new dual–core processors and quad–core processors in 2007 that we expect to deliver industry leading performance and capabilities per watt. People will see systems that can be faster, smaller and quieter with longer battery life and lower electric bills.”

Several advances mark the new microarchitecture:

  • Intel Wide Dynamic Execution –– Delivers more instructions per clock cycle, improving execution and energy efficiency. Every execution core is wider, allowing each core to complete up to four full instructions simultaneously using an efficient 14–stage pipeline.
  • Intel Intelligent Power Capability –– Includes features that further reduce power consumption by intelligently powering on individual logic subsystems only when required.
  • Intel Advanced Smart Cache –– This includes a shared L2 cache to reduce power by minimizing memory traffic and increase performance by allowing one core to utilize the entire cache when the other core is idle.
  • Intel Smart Memory Access –– Yet another feature that improves system performance by hiding memory latency and thus optimizing the use of data bandwidth out to the memory subsystem.
  • Intel Advanced Digital Media Boost –– Now all 128–bit SSE, SSE2 and SSE3 instructions execute within only one cycle. This effectively doubles the execution speed for these instructions which are used widely in multimedia and graphics applications.

Comment on this post, currently 1
Trackback


IDF: QuickTransit Technology Makes Its Way to Itanium and Xeon

Tuesday 7th March, 2006 - 17:55 GMT

Posted in: Intel Developers Conference 2006

Written by: Alex Brooks

QuickTransit is the software engine that essentially runs Rosetta the emulation software that runs on Intel Macs and emulates PPC code. Well today the company that makes the technologies has announced that it plans to fully support Intel’s upcoming Itanium 2 and Xeon Platforms.

Hopefully this shows that development for Apple’s server lineup may be in full swing.

Comment on this post, currently 0
Trackback